About me
Driven by the complexity and elegance of VLSI design, I'm pursuing my Master's at San Jose State University. My prior experience as an Embedded Engineer and Post Silicon Validation Engineer honed my skills in embedded systems development and validation and ignited my desire to delve deeper into VLSI field. I'm a quick learner and a motivated team player, seeking opportunities to contribute to cutting-edge VLSI projects.
The value that I can bring to the Team is by developing Application for Embedded Systems and providing solution for verification and validation of different IP's and SoC's that involves knowledge of different Microcontroller Architcture as well as knowledge in VLSI, Digital System Design and UVM. Focused towards the developing concise skills for ensuring high quality silicon.
What i'm doing
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Embedded Systems
Worked at a professional-level on technologies such as STM, Laird and Microcontroller's such as ARM.
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Post Silicon Validation
Contributed to Post Silcon Validation for SoC before Tap Out on different IP's.
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FPGA
Worked in International competitions and also in a Graduate Researcher position.
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IoT-4.0
Implemented IOT 4.0 at an Industrial Level.